EGEC 281 - Designing with VHDL (2)

Introduction to various modeling methods, timings, events, propagation delays and concurrency, the language constructs, data representations and formats, and physical attributes. (1 hour lecture, 2 hours laboratory)

Prerequisites: CPSC 120 or CPSC 121; EGEC 180 or EGEC 245.

Undergraduate Course not available for Graduate Credit